Digilent JTAG-HS3 Programming Cable

Features and Specifications

• Small, complete, all-in-one JTAG programming/debugging solution for Xilinx FPGAs and SoCs
• Plugs directly into standard Xilinx JTAG 2.0 mm pitch header
• Separate Vref drives JTAG signal voltages; Vref can be any voltage between 1.8V and 5V
• High-Speed USB2 port that can drive JTAG bus up to 30Mbit/sec (frequency adjustable by user)
• Compatible with Xilinx ISE 14.1 and newer, Xilinx Vivado 2013.3 and newer
• Uses USB Micro-B connector
• Open drain buffer on pin 14 allows debugging software to reset the processor core of Xilinx's Zynq platform

The JTAG-HS3 by Digilent is a high-speed programming solution for Xilinx FPGA. It enhances the successful JTAG-HS1 by incorporating an open-drain buffer to pin 14, enabling the debugging of Xilinx Zynq-SOC processors. The HS3 can be connected to target boards using Xilinx's 2x7 connector* and is compatible with all Xilinx tools, including iMPACT, ChipScope, and EDK.

When the JTAG HS3 is linked to a computer via a standard A to micro-USB cable, it draws power from the USB and can be identified as a Digilent programming cable, even if the HS3 is not connected to the target board. The JTAG bus can be shared with other devices, as the HS3's signals remain in high-impedance unless actively driven during programming. The HS3's compact and lightweight design allows it to be securely affixed by the system board connector.

*This is a unique programming header and is not compatible with the 1x6 MTE Digilent JTAG Connector.

What's in the Box

• One JTAG-HS3 Programming Cable